Class schedule | HW assignments (Including preparation and review of the class.) | Amount of Time Required | |
---|---|---|---|
1. | Introduction to LSI ・What is LSI ・The birth of integrated circuits and the history of miniaturization and scale up ・Fabrication of LSIs |
Read sections 1.1 and 1.2 of Reference 1, and pp. 58-65 of Reference 2. | 30minutes |
Review the class | 30minutes | ||
2. | Semiconductor and pn junction ・The characteristics of semiconductor ・Diode and rectification |
Read section 1.3.1 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
3. | MOS transistors ・The structure and characteristics of MOS transistors ・NMOS and PMOS |
Read sections 1.3.2 and 1.3.3 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
4. | CMOS logic circuits (1) ・The basics of logic operations ・The inverter consisting of a register and an NMOS ・CMOS inverter |
Read section 3.2.1 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
5. | CMOS logic circuits (2) ・NAND circuit and NOR circuit ・Composite gate circuit |
Read section 3.3 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
6. | CMOS logic circuits (3) ・Binary number system and arithmetic operation ・Arithmetic operational circuit |
Read section 4.2 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
7. | CMOS logic circuits (3) ・Binary number system and arithmetic operation ・Arithmetic operational circuit |
Read section 4.2 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
8. | Fabrication of LSI ・Wafer process ・The fabrication process of silicon gate NMOS transistors |
Read section 4.1 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
9. | LSI Layout design of CMOS logic circuits ・Wiring in LSI ・Layout of CMOS inverter ・Layout of NAND gate |
Read sections 5.1, 5.2, and 5.3 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
10. | LSI design flow and design styles ・LSI design flow ・Full-custom/semi-custom design styles ・Layout design in standard cell design style |
Read sections 1.2.4, 5.5, and 5.6 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
11. | Semi-custom design style ・Gate array design style ・Inter-cell routing design in gate array |
Read section 5.4 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
12. | Optimization in LSI design ・Exploring processing algorithm and high-level synthesis ・The automation of LSI design ・NP problems and heuristic algorithms |
Read pp. 112-115 of Reference 2 | 30minutes |
Review the class | 30minutes | ||
13. | EDA tools for LSI design and LSI testing ・Design entry using hardware description language ・Logic/behavior synthesis ・Layout design and design rule check ・Circuit simulation ・The type of LSI faults and the test |
Read sections 5.2 and 6.1 of Reference 1 | 30minutes |
Review the class | 30minutes | ||
14. | Summary and term-end examination ・Summary of the course ・Examination on all the contents of the course |
Review quizzes | 30minutes |
Total. | - | - | 810minutes |
小テスト | 期末試験 | Total. | |
---|---|---|---|
1. | 5% | 26% | 31% |
2. | 5% | 18% | 23% |
3. | 5% | 18% | 23% |
4. | 5% | 18% | 23% |
Total. | 20% | 80% | - |
Work experience | Work experience and relevance to the course content if applicatable |
---|---|
N/A | N/A |