Course title
1M984500,7M5900001
Advanced Computer Architecture

 USAMI Kimiyoshi Click to show questionnaire result at 2016
Course content
CPU chips are the most important components in computer systems and their performance has been continuing to grow. In this lecture, we study representative computer architectures that are actually used in high performance processor chips. In particular, we learn instruction-level, data-level and thread-level parallel architectures to improve performance. We also discuss a new topic of Domain-Specific architecture for energy efficient computing.
The material to read is provided in pdf at Scomb and Reading Assignments are directed in advance. To help understanding in reading, several basic questions are also provided about the contents of the pre-directed reading material. At every class, students are divided into groups and discuss what he/she understood through the reading material and his/her answer to the questions. Discussion is made in each breakout room of Zoom. Then, students give presentations in group order. The instructor checks the presentations and gives lecture/comments to make up for missing content in their presentation.
Purpose of class
To understand technologies in computer architecture to achieve high performance through case studies of real processor chips
Goals and objectives
  1. To understand representative computer architectures that are actually used in high performance CPU chips
  2. To understand the underlying concept and mechanisms to make use of instruction-level, data-level and thread-level parallelisms through reading, presentations and discussions
  3. To understand the challenges high-performance computers facing today and the Domain-Specific architecture through reading, presentations and discussions
Language
English
Class schedule

 Class schedule HW assignments (Including preparation and review of the class.) Amount of Time Required
1． Guidance and overview of high-performance architecture Fundamentals of computer architecture 80minutes
2． Technology/power trends and changes in computer architecture Review of changes in computer architecture, Instruction-level parallelism, Data-level parallelism and Domain-Specific architecture 200minutes
3． Instruction-level parallelism, Pipelining and Dynamic scheduling techniques Review of pipelining, hazard and concept of dynamic scheduling 200minutes
4． Dynamic scheduling and issues Review of techniques and issues in dynamic scheduling 200minutes
5． Superscalar technology (1) Review of concept of superscalar 200minutes
6． Superscalar technology (2) Review of basic components in superscalar architecture 200minutes
7． Branch prediction Review of basic and advanced branch prediction techniques 200minutes
8． Case studies of superscalar processors (1) Review of superscalar in Intel Pentium processor 200minutes
9． Case studies of superscalar processors (2) Review of superscalar in Intel Pentium2 and Pentium4 processors 200minutes
10． Data-level parallelism, Vector and SIMD architectures (1) Review of data-level parallelism in Vector architecture 200minutes
11． Data-level parallelism, Vector and SIMD architectures (2) Review of SIMD architecture for multi-media processing 200minutes
12． Thread-level parallelism (1) Review of MIMD architectures 200minutes
13． Thread-level parallelism (2) Review of cache coherence and snooping in MIMD 200minutes
14． Domain-Specific architecture Review of Domain-Specific architecture for Deep Neural Networks and Google's Tensor Processing Unit 200minutes
Total. - - 2680minutes
Relationship between 'Goals and Objectives' and 'Course Outcomes'

 Class participation and Submitted reports Presentation Discussions Total.
1. 8% 16% 16% 40%
2. 8% 16% 16% 40%
3. 4% 8% 8% 20%
Total. 20% 40% 40% -
Evaluation method and criteria
In the presentations, if the student correctly explains the mechanisms of various architectures described in the reading assignments and answers to the questions, the score 60% is given. Upper score than 60% is given depending on the quality of the contents of his/her presentations, remarks in the discussions, and reports.
Feedback on exams, assignments, etc.
ways of feedback specific contents about "Other"
Feedback in the class
Textbooks and reference materials
Textbook:
J. Hennessey and D. Patterson, “Computer Architecture, Sixth Edition: A Quantitative Approach”, Morgan Kaufmann Publishers, 2017.

Reference books:
J. Shen, M. Lipasti, “Modern Processor Design: Fundamentals of Superscalar Processors”, McGraw-Hill, 2005.
D. Patterson and J. Hennessey, “Computer Organization and Design RISC-V Edition: The Hardware Software Interface”, Morgan Kaufmann Publishers, 2017.
Prerequisites
The target students of this class are graduate students. They must have already earned credits in computer architecture fundamentals from an undergraduate course.
Office hours and How to contact professors for questions
  • 11:00am – 12:00 on Thursdays
Regionally-oriented
Non-regionally-oriented course
Development of social and professional independence
  • Course that cultivates an ability for utilizing knowledge
  • Course that cultivates a basic problem-solving skills
Active-learning course
Most classes are interactive
Course by professor with work experience
Work experience Work experience and relevance to the course content if applicable
Applicable Utilizing his experience in the design and development of CPU chips in a major domestic electronics manufacturer, he teaches the advanced computer architecture technology necessary for the development of computer systems.
Education related SDGs:the Sustainable Development Goals
  • 4.QUALITY EDUCATION
  • 7.AFFORDABLE AND CLEAN ENERGY
Last modified : Sat Sep 09 07:23:16 JST 2023