Course title
7M2200001
Intensive course on Integrated Circuits Analysis and Design 2

NICODIMUS RETDIAN Click to show questionnaire result at 2018
Course content
This course provides basic knowledge in integrated circuits analysis and design. It will include:
1) basic verification procedures using circuit simulators
2) layout of integrated circuits
3) post-layout verification

Note that this course is only available in a face-to-face classes.
Due to the limitation of workstations, the number of student will be limited to 8. The students will be selected based on students skill and motivation.

Students who wish to take this course should contact the lecturer in advance (see the contact address bellow).
Purpose of class
This course aims to make the students understand the basic of integrated circuit design and implementation.
Goals and objectives
  1. The students can understand and explain the role of verification in integrated circuit design
  2. The students can set up proper verification procedures for operational amplifiers
  3. The students can correctly draw a layout of an operational amplifier
Language
English
Class schedule

Class schedule HW assignments (Including preparation and review of the class.) Amount of Time Required
1. Module 1 :
Class guidance
Operational amplifier design
Review operational amplifier from Intensive Course 1 200minutes
2. Module 2 :
Reference design 1
Review reference circuit from Intensive Course 1 200minutes
3. Module 3 :
Reference design 2
Review reference design 1 200minutes
4. Module 4 :
Input stage design 1
Review differential pair 200minutes
5. Module 5 :
Input stage design 2
Review cascode connection 200minutes
6. Module 6 :
2-nd stage design
Review common source amplifier 200minutes
7. Mid-term presentation and discussion Prepare for 30 minutes presentation 300minutes
8. Module 7 :
Output stage design
Review output stage from Intensive Course 1 200minutes
9. Module 8 :
Compensation technique
Review feedback and stability from Intensive Course 1 200minutes
10. Module 9 :
Layout and design rule check 1
Review MOS structure 200minutes
11. Module 10 :
Layout and design rule check 2
Review MOS structure 200minutes
12. Module 11 :
Debugging using layout versus schematic
Review overall operational amplifier topology 200minutes
13. Module 12 :
Parasitic extraction and post layout verification
Review semiconductor device characteristic 200minutes
14. Final presentation and discussion Prepare for 30 minutes presentation 300minutes
Total. - - 3000minutes
Relationship between 'Goals and Objectives' and 'Course Outcomes'

quiz presentations performance Total.
1. 5% 20% 5% 30%
2. 5% 20% 10% 35%
3. 5% 20% 10% 35%
Total. 15% 60% 25% -
Evaluation method and criteria
quiz 15pts + presentations 60 pts + performance 25pts= 100 pts.

To earn the credits of this course, student shall:
1. Get at least 60% of the total point
2. Make both midterm and final presentations

Students will earn at least 60% of performance points if their design meet the minimum design specification.
Feedback on exams, assignments, etc.
ways of feedback specific contents about "Other"
Feedback in the class
Textbooks and reference materials
Paul R.Gray, et.al., "Analysis and design of analog integrated circuits - fifth edition," Wiley 2009.
Prerequisites
Should take the credit of Intensive course on Integrated Circuits Analysis and Design 1
The course will be cancelled if the attending students is less than 3
Office hours and How to contact professors for questions
  • Friday 9:00-12:00
  • Contact address: nico[at]shibaura-it.ac.jp
Regionally-oriented
Non-regionally-oriented course
Development of social and professional independence
  • Course that cultivates an ability for utilizing knowledge
  • Course that cultivates a basic problem-solving skills
Active-learning course
About half of the classes are interactive
Course by professor with work experience
Work experience Work experience and relevance to the course content if applicable
N/A N/A
Education related SDGs:the Sustainable Development Goals
  • 4.QUALITY EDUCATION
  • 9.INDUSTRY, INNOVATION AND INFRASTRUCTURE
Last modified : Sat Sep 09 07:24:16 JST 2023