Integrated circuits are used in various systems today, and their use in IoT (Internet of Things) systems is expanding using
LSIs such as system-on-chip (SoC). In order to design integrated circuits, it is necessary to understand physical design technology,
high-level synthesis technology by RTL, design verification technology, test technology, etc., in addition to circuit technology
such as analog circuit and digital circuit.
In this lecture, students will understand the main components that make up integrated circuits, understand the flow of the
entire LSI design process such as system-on-chip (SOC), and acquire the basic knowledge to master LSI design tools. The purpose
is to do that. Students also aim to acquire the skills to process small examples with CAD tools and make simple designs.
- Understand the operation of the basic elements and components that make up a CMOS integrated circuit.
- Understand the LSI design flow.
- Understand the role of CAD tools used at each design stage.
- Understand optimization methods such as layout processing and timing design based on the concept of synchronous circuits.
- Understand the technical issues of advanced LSIs and LSI testing technology.
| Test | Report | Exam | Total. | |
|---|---|---|---|---|
| 1. | 6% | 8% | 14% | |
| 2. | 6% | 10% | 8% | 24% |
| 3. | 6% | 12% | 5% | 23% |
| 4. | 4% | 15% | 10% | 29% |
| 5. | 4% | 6% | 10% | |
| Total. | 26% | 37% | 37% | - |
A test 26%, a report assignment 37%, and an Exam 37% are set as 100 points, and a total score of 60 points or more is passed.
In addition, it should be noted.
In the test, if the comprehension test of the handouts can be solved, it will be 60%.
In the report assignment, 60% will be the case where all the required report items are reported.
In the final exam, 60% will be given if the exercises in the handouts can be solved without fail.
In addition, it should be noted.
In the test, if the comprehension test of the handouts can be solved, it will be 60%.
In the report assignment, 60% will be the case where all the required report items are reported.
In the final exam, 60% will be given if the exercises in the handouts can be solved without fail.
| Class schedule | HW assignments (Including preparation and review of the class.) | Amount of Time Required | |
|---|---|---|---|
| 1. | What is an LSI (including guidance): LSI application, LSI type (Memory, SoC, FPGA, ...), Moore's law and system LSI development, CMOS technology features | Prepare for "what is a system LSI" | 40minutes |
| Review the lecture content and solve the comprehension test | 150minutes | ||
| 2. | Description of MOS transistor: MOS transistor and logic gate as a switch, cross-section / planar structure of MOS transistor, brief explanation of manufacturing process technology | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| 3. | Operation theory of MOS transistor: Current type, CMOS inverter operation (input / output characteristics and delay), layout example of inverter, NAND, NOR, etc. | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| 4. | CMOS circuit: Basic CMOS circuit, input / output circuit, power consumption of CMOS circuit | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| 5. | Sequential circuit: Binary counter, flip-flop, latch, memory circuit, synchronous circuit and asynchronous circuit, clock Small tests on LSI, MOS transistors, CMOS |
Read the relevant part of the handouts | 30minutes |
| Review the lecture content and solve the comprehension test | 30minutes | ||
| The test will ask questions about the lectures of 1-4. | 130minutes | ||
| 6. | LSI realization method: FPGA and system LSI, standard cell, gate array, etc. realization method and library, system LSI design procedure / flow, design abstraction and design productivity | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| 7. | Design flow using RTL description: Review of binary / octal / hexadecimal numbers and representation inside LSI, simple RTL description, examples of adders, test bench, simulation implementation and logic synthesis | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| 8. | Description of sequential circuit using RTL: Explained using examples of flip-flops, counters, shift registers, etc. | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| 9. | Example of design using RTL: Explains actual examples from specifications to RTL description for simple systems, and explains
verification by simulation and logic synthesis ・ Report assignment |
Read the relevant part of the handouts Report assignments will be presented at the end of lecture |
30minutes |
| Review the lecture content and solve the comprehension test | 30minutes | ||
| Creating a report | 130minutes | ||
| 10. | Functional logic verification: Explaining the creation of a test bench using an example | Read the relevant part of the handouts | 30minutes |
| Review the lecture content and solve the comprehension test | 30minutes | ||
| Creating a report | 130minutes | ||
| 11. | Practical design using RTL: RTL description for simple sequential circuit, verification by simulation and logic synthesis ・ Report assignment |
Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| Creating a report | 1300minutes | ||
| 12. | Layout design details: How to realize special wiring such as power supply wiring and clock wiring, introduction of algorithms for automatic layout, layout verification | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| Creating a report | 130minutes | ||
| 13. | Timing verification and timing convergence: Timing problems in LSI design, DFM (Design for Manufacturing), LSI power consumption and power reduction | Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| Creating a report | 130minutes | ||
| 14. | LSI test and tester: failure model, failure simulation, automatic test pattern generation, test facilitation design, BIST Future issues in LSI development: Speeding up and complication |
Read the relevant part of the handouts | 70minutes |
| Review the lecture content and solve the comprehension test | 120minutes | ||
| Creating a report | 130minutes | ||
| Total. | - | - | 4350minutes |
| ways of feedback | specific contents about "Other" |
|---|---|
| Feedback in the class |
Materials based on "System LSI Design: LSI Design" published by Semiconductor Technology Academic Research Center (STARC)
will be distributed during the lecture.
Using Verilog HDL is planed, so the reference book is useful. For example, Kobayashi, hdLab: “CQ Endeavor Verilog HDL”, CQ Publishing
For the operation of MOS transistors, Hara, et al.: "Theory of operation of MOS transistors", Kindai kagaku sha Co., Ltd., 1980
Regarding CMOS circuits, Hara, et al .: "Basics of MOS Integrated Circuits", Kindai kagaku sha Co., Ltd., 1992
Using Verilog HDL is planed, so the reference book is useful. For example, Kobayashi, hdLab: “CQ Endeavor Verilog HDL”, CQ Publishing
For the operation of MOS transistors, Hara, et al.: "Theory of operation of MOS transistors", Kindai kagaku sha Co., Ltd., 1980
Regarding CMOS circuits, Hara, et al .: "Basics of MOS Integrated Circuits", Kindai kagaku sha Co., Ltd., 1992
It is desirable to take courses such as electric circuits 1-3, analog electronic circuits 1 and 2, digital electronic circuits
1 and 2, and semiconductor engineering. In addition, it is desirable to be able to operate the computer (create a simple program,
compile and execute).
- Questions and consultations will be accepted at the classroom from 15:00 to 15:10 immediately after the lecture.
If you would like to have a consultation on the Zoom, please contact me by e-mail in advance and I will respond from 15:20 to 15:40 after the lecture.
- Course that cultivates an ability for utilizing knowledge
- Course that cultivates a basic problem-solving skills
| Work experience | Work experience and relevance to the course content if applicable |
|---|---|
| Applicable | Based on the work experience, which is Integrated and electronic circuit development at a motor company, design methods of the recent integrated and electronic circuit are taught. |
Last modified : Sat Mar 08 04:26:04 JST 2025