Course title
F00080001
Logic Circuits Design

 MUTO Kenji
Middle-level Diploma Policy (mDP)
Program / Major mDP Goals Courses
Fundamental Mechanical Engineering F 産業界や社会の要請を把握して解決するべき課題を設定し、さまざまな工学分野の知識を関連付けながら設計生産技術を活用することで、立案した構想に従って研究を進め課題を解決することができる。 Sub
Advanced Mechanical Engineering F 産業界や社会の要請を把握して解決するべき課題を設定し、機械工学の学理を応用して異分野を含む融合分野で革新的な機能を創成することができる。 Sub
Environment and Materials Engineering B 地球環境や地域社会との調和を見据えて、さまざまな工学分野に関わる問題を解決することができる。 Sub
Chemistry and Biotechnology B 地球環境や地域社会との調和を見据えて、さまざまな工学分野に関わる問題を解決することができる。 Sub
Information and Communications Engineering B-1 情報通信工学に共通する基礎的な概念を習得することができる。 Main
Urban Infrastructure and Environment G ⼟⽊⼯学における現実の問題について、⼯学・専⾨基礎知識を⽤いて理解・解決することができる。 Sub
Purpose of class
By this class, it is lectured the basic design technique of the logical circuit. In addition, it is given an outline constitution and the operation of various digital circuits.
Course description
The digitization namely the computerization improved the performance of the apparatus drastically. The communications equipment which took in digitech is one of the things receiving the great benefit.
In this class, it is lectured constitution and the operation of the basic design technique of the logical circuit and various digital circuits.
Goals and objectives
  1. Students will be able to describe logical operation
  2. They will be able to perform the bases of logical operation
  3. They will be able to describe the bases of the design of logical circuit
  4. They will be able to understand the bases characteristics of the design of logical circuit
  5. They will be able to understand the logical circuit of combination circuit and sequential circuit
Relationship between 'Goals and Objectives' and 'Course Outcomes'

 midterm examination term examination exercises Total.
1. 5% 5% 2% 12%
2. 7% 5% 3% 15%
3. 8% 10% 10% 28%
4. 5% 10% 10% 25%
5. 5% 10% 5% 20%
Total. 30% 40% 30% -
Evaluation method and criteria
Grade is judged by the midterm examination (30%), the term examination (40％), reports, quizzes and exercises (30%). Passing standard is over 60%.
The minimum score 60 can be obtained if the student has reached the level to be able to solve 80% of the exercises in the textbook.
Language
Japanese
Class schedule

 Class schedule HW assignments (Including preparation and review of the class.) Amount of Time Required
1. Overview of logical circuit
Expression of a number (1)
- Decimal number, hex digit, binary 		Review the syllabus
Preview Chapters 1.1.1–1.1.3
Review the end-of-chapter exercises 		190minutes
2. Expression of a number (2)
- decimal fraction
- cardinal number
- complement number 		Preview Chapters 1.1.4–1.2
Review the end-of-chapter exercises 		190minutes
3. Basic of logical operation of logical
- Set theory, Venn diagram, truth table
- Cardinal law of the Boolean algebra
- Basic Boolean operation and functional symbol 		Preview Chapters 2.1.1–1.1.3
Review the end-of-chapter exercises 		190minutes
4. Basic of logical operation of logical
- Complete set
Canonical form and truth table of the logic function (1)
- Disjunctive normal form 		Preview Chapters 2.1.4–2.2.1
Review the end-of-chapter exercises 		190minutes
5. Truth table and nomal form of logical function (2)
- Conjunctive normal form 		Review of Chapter 2.2
Review the end-of-chapter exercises 		190minutes
6. Truth table and nomal form of logical function (3)
- Exercise 		Review of Chapter 2.2
Review the end-of-chapter exercises 		190minutes
7. Simplification of logical formula (1)
- Simplification using Karnaugh map 		Review of Chapter 2.2.5
Review the end-of-chapter exercises 		190minutes
8. Examination
Explanation 		Review the end-of-chapter exercises 190minutes
9. Simplification of logical formula (2)
- Simplification using Karnaugh map
- In case of redundant term 		Review of Chapters 3.1-3.3
Review the end-of-chapter exercises 		190minutes
10. Simplification of logical formula (3)
- Simplification using Quine-McCluskey algorithm 		Review of Chapters 3.4 and 4
Review the end-of-chapter exercises 		190minutes
11. Simplification of logical formula (4)
- Simplification using Quine-McCluskey algorithm
- In case of redundant term
- Exercise 		Review of Chapters 3.5 and 4
Review the end-of-chapter exercises 		190minutes
12. Logic gate
- Half adder
- Full adder
- Data selector
- Demultiplexer 		Review of Chapters 3.6 and 5
Review the end-of-chapter exercises 		190minutes
13. Flip flop
- Register
- Shift register
- Counter 		Review of Chapter 5
Review the end-of-chapter exercises 		190minutes
14. Examination
Explanation 		Review the end-of-chapter exercises 190minutes
Total. - - 2660minutes
Feedback on exams, assignments, etc.
ways of feedback specific contents about "Other"
Feedback in the class
Textbooks and reference materials
Textbook: Ryuji Hamabe, Introduction fo logical circuit, Morikita Press.
Prerequisites
None
Office hours and How to contact professors for questions
  • After the class
Regionally-oriented
Non-regionally-oriented course
Development of social and professional independence
  • Course that cultivates an ability for utilizing knowledge
Active-learning course
N/A
Course by professor with work experience
Work experience Work experience and relevance to the course content if applicable
N/A N/A
Education related SDGs:the Sustainable Development Goals
  • 9.INDUSTRY, INNOVATION AND INFRASTRUCTURE
Last modified : Sat Mar 14 13:37:07 JST 2026