Course title
L00290003
Engineering on Integrated Circuit

 KANAO Taro
Middle-level Diploma Policy (mDP)
Program / Major mDP Goals Courses
Fundamental Mechanical Engineering F 産業界や社会の要請を把握して解決するべき課題を設定し、さまざまな工学分野の知識を関連付けながら設計生産技術を活用することで、立案した構想に従って研究を進め課題を解決することができる。 Sub
Advanced Mechanical Engineering F 産業界や社会の要請を把握して解決するべき課題を設定し、機械工学の学理を応用して異分野を含む融合分野で革新的な機能を創成することができる。 Sub
Environment and Materials Engineering B 地球環境や地域社会との調和を見据えて、さまざまな工学分野に関わる問題を解決することができる。 Sub
Chemistry and Biotechnology B 地球環境や地域社会との調和を見据えて、さまざまな工学分野に関わる問題を解決することができる。 Sub
Electrical Engineering and Robotics D 電気工学や関連する工学の技術分野を課題に適用し、社会の要求を解決するために応用することができる。 Sub
Information and Communications Engineering F 社会のニーズに対して技術課題を主体的に発見し、工学分野における分野横断的な知識も活用しつつ、計画的・継続的に取り組んで課題を達成することができる。 Sub
Computer Science and Engineering B-2 コンピュータサイエンスの各分野の基礎知識とその応用能力を身に付けることができる。 Main
Urban Infrastructure and Environment G ⼟⽊⼯学における現実の問題について、⼯学・専⾨基礎知識を⽤いて理解・解決することができる。 Sub
Purpose of class
Students will learn the internal structure and operation mechanism of large-scale integrated circuits (LSI) forming the core of the modern computer, and understand how information processing is done.
Course description
Students will learn the internal structure and operation principle of integrated circuits. Especially, taking CMOS (complementary metal oxide semiconductor) digital integrated circuits, which are mainstream in processors and memories etc, as examples, students will acquire knowledge on the overall design of integrated circuits.
Goals and objectives
  1. To be able to describe the basic structure of CMOS circuits.
  2. To be able to explain the mechanism of CMOS circuit operation.
  3. To be able to describe the design and manufacturing methods of integrated circuits.
Relationship between 'Goals and Objectives' and 'Course Outcomes'

 Final exam Tests during class Total.
1. 20% 15% 35%
2. 25% 15% 40%
3. 15% 10% 25%
Total. 60% 40% -
Evaluation method and criteria
We score 60% for the final exam, 40% for the tests during the class.
In the final exam and the tests during the class, if a student can solve examples in the textbook, the score will be at least 60%.
Language
Japanese
Class schedule

 Class schedule HW assignments (Including preparation and review of the class.) Amount of Time Required
1. What is an integrated circuit? Check the syllabus. Review the chapter 1 of the textbook. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
2. Switch elements: MOS transistor and MOS structure Check the chapter 2. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
3. CMOS combinational circuits Check the chapter 3. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
4. Manufacturing method for integrated circuit Check the chapter 4. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
5. How the operation speed of the integrated circuit is determined Check the chapter 5. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
6. Delay time of CMOS circuits Check the chapter 6. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
7. MOS transistor’s weakness as switch and mechanism of transmission gate Check the chapter 7. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
8. CMOS memory circuit and its operation mechanism Check the chapter 8. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
9. Timing design of integrated circuits (1) Check the sections 9.1, 9.2, and 9.3.1. 95minutes
Review the contents of the lecture and solve the examples in the sections 9.1, 9.2, and 9.3.1. 95minutes
10. Timing design of integrated circuits (2) Check the sections 9.3.2 and 9.4. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
11. Design method and automatic design flow for integrated circuit Check the chapter 10. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
12. Low power design for integrated circuit Check the chapter 11. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
13. Internal structure of FPGA and mechanism of operation Check the chapter 12. 95minutes
Review the contents of the lecture and solve exercises. 95minutes
14. Final exam and review Check the contents of chapters 1-12 and the contents of the lecture. 95minutes
Solve the corresponding examples and exercises again. 95minutes
Total. - - 2660minutes
Feedback on exams, assignments, etc.
ways of feedback specific contents about "Other"
Feedback in/outside the class.
Textbooks and reference materials
FPGA時代に学ぶ集積回路のしくみ、宇佐美公良著、コロナ社
[Introduction to Digital VLSI Design in FPGA Era (in Japanese), Kimiyoshi Usami, Corona Publishing]
Prerequisites
Computer architecture, Logical circuit
Office hours and How to contact professors for questions
  • Every Thursday, 12:00-13:00
Regionally-oriented
Non-regionally-oriented course
Development of social and professional independence
  • Course that cultivates an ability for utilizing knowledge
Active-learning course
More than one class is interactive
Course by professor with work experience
Work experience Work experience and relevance to the course content if applicable
Applicable Utilizing his experience in the research and development of computer hardware at an electronics manufacturer, he teaches the structures, operation principles, and design technologies of computer hardware.
Education related SDGs:the Sustainable Development Goals
  • 4.QUALITY EDUCATION
  • 7.AFFORDABLE AND CLEAN ENERGY
  • 9.INDUSTRY, INNOVATION AND INFRASTRUCTURE
Last modified : Sat Mar 14 14:50:13 JST 2026